#include "USART1.h"

volatile USART_HANDLER_TYPE         USART1STR ={
    .TxBufCount = 0,
	.TxSendedCount = 0,
	.RxBufCount = 0,
	.RxComplete = 0,
	.TxComplete = 1,
	.InterFrameTimeoutTicks = 0,
};
//Do not remove volatile!!!
volatile  uint8_t 	USART1_RX_BUF[USART1_BUF_SIZE];				//	RX buffer
volatile  uint8_t 	USART1_TX_BUF[USART1_BUF_SIZE];				//	TX buffer

//	USARTs common settings : Speed and Timeouts
const uint16_t USART_UBRR[8]	PROGMEM= {   (F_CPU/8UL)/19200-1,    (F_CPU/8UL)/500000-1,
                                             (F_CPU/8UL)/2400-1,     (F_CPU/8UL)/9600-1,
                                             (F_CPU/8UL)/115200-1,   (F_CPU/8UL)/250000-1,
                                             (F_CPU/8UL)/1000000-1,  /*(F_CPU/8UL)/10000000-1*/ 0
                                      };		//	Fosc=16MHz : 19.2k, 500k, 2.4k, 9.6k, 115.2k, 250k, 1M, 1M
const uint16_t USART_TIMEOUT[8]	PROGMEM= {	(IDIBUS_19200B_INTERFRAME_TIMEOUT_US/8*16),		(IDIBUS_500K_INTERFRAME_TIMEOUT_US/8*16),
                                            (IDIBUS_2400B_INTERFRAME_TIMEOUT_US/8*16),		(IDIBUS_9600B_INTERFRAME_TIMEOUT_US/8*16),
                                            (IDIBUS_115200B_INTERFRAME_TIMEOUT_US/8*16),	(IDIBUS_250K_INTERFRAME_TIMEOUT_US/8*16),
                                            (IDIBUS_1M_INTERFRAME_TIMEOUT_US/8*16),			(IDIBUS_1M_INTERFRAME_TIMEOUT_US/8*16)
                                         };
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
ISR(USART1_TX_vect)
{
	if (USART1STR.TxSendedCount == USART1STR.TxBufCount)
	{
		//UCSR1B &= ~((1<<TXCIE1)|(1<<TXEN1));
		UCSR1B=(1<<RXCIE1)|(1<<RXEN1);
		USART1STR.TxSendedCount = 0;
		USART1STR.TxBufCount = 0;
		USART1STR.TxComplete = 1;
		USART1_TX_DDR&=~(1<<USART1_TX_BIT);
		USART1_TX_PORT|=1<<USART1_TX_BIT;			//	TXD -> Z
		USART1_DRE_DDR&=~(1<<USART1_DRE_BIT);
		USART1_DRE_PORT&=~(1<<USART1_DRE_BIT);	//	RDE -> Z
	}
	else
	{
		UDR1=USART1_TX_BUF[USART1STR.TxSendedCount];
		USART1STR.TxSendedCount++;
	}
}
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
ISR(USART1_RX_vect)
{
	//TIMSK3=0;
	TCNT3=0; //	Timeout Timer3 On, clkI/O/8 (From prescaller)
	TCCR3B=2;
	TIMSK3=1<<OCIE3A;

	if (UCSR1A & ((1<<FE1) | (1<<DOR1)) )
		USART1STR.RxError = 1;

	if (USART1STR.RxBufCount < USART1_BUF_SIZE)
	{
		USART1_RX_BUF[USART1STR.RxBufCount] = UDR1;
		USART1STR.RxBufCount++;
	}
}
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
ISR(TIMER3_COMPA_vect)
{
	TCCR3B=0;
	TCNT3=0;
	TIMSK3=0;								//	Timeout TIMER3 off
	UCSR1B &= ~((1<<RXCIE1)|(1<<RXEN1));				//	RX off
	USART1STR.RxComplete = 1;										//	RX data ready
}
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
void USART1_Init(void)
{
	USART1_TX_DDR&=~(1<<USART1_TX_BIT);
	USART1_TX_PORT|=1<<USART1_TX_BIT;			//	TXD -> Z
	USART1_RX_DDR&=~(1<<USART1_RX_BIT);
	USART1_RX_PORT|=1<<USART1_RX_BIT;			//	RXD -> Z
	USART1_DRE_DDR&=~(1<<USART1_DRE_BIT);
	USART1_DRE_PORT&=~(1<<USART1_DRE_BIT);	//	RDE -> 0

	UCSR1A=(1<<U2X1);
	UCSR1B=(1<<RXCIE1)|(1<<RXEN1);									//	RX enable
	UCSR1C=(1<<UCSZ10)|(1<<UCSZ11)|(1<<USBS1);						//	8 bit, 2 stop
	TCCR3B=0;
	TCNT3=0;
	TIMSK3=0;								//	Timeout TIMER3 off
}
void  USART1_copyRxBuf(uint8_t *Dst, uint16_t StartPos, uint16_t Count)
{
	_memcopy(&USART1_RX_BUF[StartPos], Dst,Count);
}
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
void USART1_SetIdiBusBoudrate(enum IDIBUS_SERIAL_BAUDRATE BoudrateCode)
{
	UBRR1 = flash_read_word((USART_UBRR),(BoudrateCode<<1));
	USART1STR.InterFrameTimeoutTicks = flash_read_word((USART_TIMEOUT),(BoudrateCode << 1));
	OCR3A = USART1STR.InterFrameTimeoutTicks;
}
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
void  USART1_SendTxBuf(uint16_t Count)
{
	if ( (!USART1STR.TxComplete) || (Count == 0) || (Count > USART1_BUF_SIZE) )
	{
		return;
	}
	USART1_TX_DDR|=1<<USART1_TX_BIT;
	USART1_TX_PORT|=1<<USART1_TX_BIT;			//	TXD -> out
	USART1_DRE_DDR|=1<<USART1_DRE_BIT;
	USART1_DRE_PORT|=1<<USART1_DRE_BIT;
	USART1STR.TxComplete = 0;
	USART1STR.TxBufCount = Count;
	USART1STR.TxSendedCount = 1;
	//UCSR1B &= ~((1<<RXCIE1)|(1<<RXEN1));				//	RX off
	UCSR1B=(1<<TXCIE1)|(1<<TXEN1);
	UDR1 = USART1_TX_BUF[0];
}
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
void  USART1_RxTransferRestart(void)
{
	UCSR1B|=(1<<RXCIE1)|(1<<RXEN1);
	USART1STR.RxBufCount = 0;
	USART1STR.RxComplete = 0;
	USART1STR.RxError = 0;
}
//--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------